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  typical connection high and low side driver features ? floating channel designed for bootstrap operation fully operational to +600v tolerant to negative transient voltage dv/dt immune ? gate drive supply range from 10 to 20v (ir2106(4)) ? undervoltage lockout for both channels ? 3.3v, 5v and 15v input logic compatible ? matched propagation delay for both channels ? logic and power ground +/- 5v offset. ? lower di/dt gate driver for better noise immunity ? outputs in phase with inputs (ir2106) ? also available lead-free packages 14-lead pdip 14-lead soic ir2106(4)(s) & (pbf) 8-lead pdip 8-lead soic www.irf.com 1 data sheet no. pd60162 rev. w (refer to lead assignments for cor- rect pin configuration). this/these diagram(s) show electrical connec- tions only. please refer to our appli- cation notes and designtips for proper circuit board layout. part input logic cross- conduction prevention logic dead-time ground pins ton/toff 2106/2301 com 21064 hin/lin no none vss/com 220/200 2108 internal 540ns com 21084 hin/lin yes programmable 0.54~5 s vss/com 220/200 2109/2302 internal 540ns com 21094 in/sd yes programmable 0.54~5 s vss/com 750/200 2106/2301//2108//2109/2302/2304 feature comparison 2304 hin/lin yes internal 100ns com 160/140 description the ir2106(4)(s) are high voltage, high speed power mosfet and igbt drivers with independent high and low side referenced output chan- nels. proprietary hvic and latch immune cmos technologies enable ruggedized monolithic construction. the logic input is compatible with standard cmos or lsttl output, down to 3.3v logic. the output drivers feature a high pulse current buffer stage designed for minimum driver cross-conduction. the floating channel can be used to drive an n-channel power mosfet or igbt in the high side configuration which operates up to 600 volts. ir2106 v cc v b v s ho lo com hin lin up to 600v to load v cc lin hin ir21064 up to 600v to load v cc v b v s ho lo com hin v ss lin v cc v ss lin hin
ir2106(4) ( s ) & (pbf) 2 www.irf.com symbol definition min. max. units v b high side floating absolute voltage -0.3 625 v s high side floating supply offset voltage v b - 25 v b + 0.3 v ho high side floating output voltage v s - 0.3 v b + 0.3 v cc low side and logic fixed supply voltage -0.3 25 v lo low side output voltage -0.3 v cc + 0.3 v in logic input voltage v ss - 0.3 v cc + 0.3 v ss logic ground (ir21064 only) v cc - 25 v cc + 0.3 dv s /dt allowable offset supply voltage transient ? 50 v/ns p d package power dissipation @ t a +25 c (8 lead pdip) ? 1.0 (8 lead soic) ? 0.625 (14 lead pdip) ? 1.6 (14 lead soic) ? 1.0 rth ja thermal resistance, junction to ambient (8 l ead p dip) ? 125 (8 lead soic) ? 200 (14 lead pdip) ? 75 (14 lead soic) ? 120 t j junction temperature ? 150 t s storage temperature -50 150 t l lead temperature (soldering, 10 seconds) ? 300 absolute maximum ratings absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. all voltage param- eters are absolute voltages referenced to com. the thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. v c c/w w
ir2106(4) ( s & (pbf) ) www.irf.com 3 dynamic electrical characteristics v bias (v cc , v bs ) = 15v, v ss = com, c l = 1000 pf, t a = 25 c. symbol definition min. typ. max. units test conditions t on turn-on propagation delay ? 220 300 v s = 0v t off turn-off propagation delay ? 200 280 v s = 0v or 600v mt delay matching, hs & ls turn-on/off ? 0 30 t r turn-on rise time ? 150 220 v s = 0v t f turn-off fall time ? 50 80 v s = 0v nsec note 1: logic operational for v s of -5 to +600v. logic state held for v s of -5v to -v bs . (please refer to the design tip dt97-3 for more details). vb high side floating supply absolute voltage ir2106(4) v s + 10 v s + 20 v s high side floating supply offset voltage note 1 600 v ho high side floating output voltage v s v b v cc low side and logic fixed supply voltage ir2106(4) 10 20 v lo low side output voltage 0 v cc v in logic input voltage v ss v cc v ss logic ground (ir21064 only) -5 5 t a ambient temperature -40 125 c v symbol definition min. max. units recommended operating conditions the input/output logic timing diagram is shown in figure 1. for proper operation the device should be used within the recommended conditions. the v s and v ss offset rating are tested with all supplies biased at 15v differential.
ir2106(4) ( s ) & (pbf) 4 www.irf.com static electrical characteristics v bias (v cc , v bs ) = 15v, v ss = com and t a = 25 c unless otherwise specified. the v il , v ih and i in parameters are referenced to v ss /com and are applicable to the respective input leads. the v o , i o and ron parameters are referenced to com and are applicable to the respective output leads: ho and lo. symbol definition min. typ. max . units test conditions v ih logic ?1? input voltage (ir2106(4)) 2.9 ? ? v cc = 10v to 20v v il logic ?0? input voltage (ir2106(4)) ? ? 0.8 v cc = 10v to 20v v oh high level output voltage, v bias - v o ? 0.8 1.4 i o = 20 ma v ol low level output voltage, v o ? 0.3 0.6 i o = 20 ma i lk offset supply leakage current ? ? 50 v b = v s = 600v i qbs quiescent v bs supply current 20 75 130 v in = 0v or 5v i qcc quiescent v cc supply current 60 120 180 v in = 0v or 5v i in+ logic ?1? input bias current v in = 5v (ir2106(4)) ? 5 20 i in- logic ?0? input bias current v in = 0v (ir2106(4)) ? ? 2 v ccuv+ v cc and v bs supply undervoltage positive going 8.0 8.9 9.8 v bsuv+ threshold v ccuv- v cc and v bs supply undervoltage negative going 7.4 8.2 9.0 v bsuv- threshold v ccuvh hysteresis 0.3 0.7 ? v bsuvh i o+ output high short circuit pulsed current 120 200 ? v o = 0v, pw 10 s i o- output low short circuit pulsed current 250 350 ? v o = 15v, pw 10 s v a ma v
ir2106(4) ( s & (pbf) ) www.irf.com 5 functional block diagrams ir2106 lin uv detect delay com lo vcc hin vs ho vb pulse filter hv level shifter r r s q uv detect pulse generator vss/com level shift vss/com level shift ir21064 lin uv detect delay com lo vcc hin vss vs ho vb pulse filter hv level shifter r r s q uv detect pulse generator vss/com level shift vss/com level shift
ir2106(4) ( s ) & (pbf) 6 www.irf.com 14 lead pdip 14 lead soic ir21064 ir21064s lead assignments 8 lead pdip 8 lead soic lead definitions symbol description hin logic input for high side gate driver output (ho), in phase lin logic input for low side gate driver output (lo), in phase vss logic ground (ir21064 only) v b high side floating supply ho high side gate drive output v s high side floating supply return v cc low side and logic fixed supply lo low side gate drive output com low side return ir2106 ir2106s 1 2 3 4 8 7 6 5 v cc hin lin com v b ho v s lo 1 2 3 4 8 7 6 5 v cc hin lin com v b ho v s lo 1 2 3 4 5 6 7 1 4 13 12 11 10 9 8 v cc hin lin vss com lo v b ho v s 1 2 3 4 5 6 7 1 4 13 12 11 10 9 8 v cc hin lin vss com lo v b ho v s
ir2106(4) ( s & (pbf) ) www.irf.com 7 figure 3. delay matching waveform definitions hin lin ho 50% 50% 10% lo 90% mt ho lo mt figure 1. input/output timing diagram hin lin ho lo figure 2. switching t ime waveform definitions hin lin t r t on t f t off ho lo 50% 50% 90% 90% 10% 10%
ir2106(4) ( s ) & (pbf) 8 www.irf.com 0 100 200 300 400 500 -50 -25 0 25 50 75 100 125 temperature ( o c) turn-on propagation delay (ns) typ. max 0 100 200 300 400 500 10 12 14 16 18 20 v bias supply voltage (v) turn-on propagation delay (ns) typ. m ax. 0 100 200 300 400 500 -50 -25 0 25 50 75 100 125 temperature ( o c) turn-of f propagation delay (ns) m ax. typ. 0 100 200 300 400 500 10 12 14 16 18 20 v bias supply voltage (v) turn-of f propagation delay (ns) typ. m ax. figure 4a. turn-on propagation delay vs. temperature figure 4b. turn-on propagation delay vs. supply voltage figure 5a. turn-off propagation delay vs. temperature figure 5b. turn-off propagation delay vs. supply volta ge
ir2106(4) ( s & (pbf) ) www.irf.com 9 0 100 200 300 400 500 -50 -25 0 25 50 75 100 125 temperature ( o c) tur n-on ris e time (ns ) m ax. typ. 0 100 200 300 400 500 10 12 14 16 18 20 v bias supply voltage (v) turn-on rise time (ns) typ. max. 0 50 100 150 200 -50-25 0 25 50 75100125 temperature ( o c) tur n-of f fall time ( ns ) max. typ. 0 50 100 150 200 10 12 14 16 18 20 v bias supply v oltage (v ) tur n- of f fall time (ns ) typ. max. figure 6a. turn-on rise time vs. temperature figure 6b. turn-on rise time vs. supply voltage figure 7a. turn-off fall time vs. temperature figure 7b. turn-off fall time vs. supply volta ge
ir2106(4) ( s ) & (pbf) 10 www.irf.com 0 1 2 3 4 5 6 7 8 -50 -25 0 25 50 75 100 125 temperature ( o c) input voltage (v) max. 0 1 2 3 4 5 6 7 8 10 12 14 16 18 20 v cc supply voltage (v) input voltage (v) max. 0. 0 0. 8 1. 6 2. 4 3. 2 4. 0 -50 -25 0 25 50 75 100 125 temperature ( o c) input voltage (v) mi n. 0. 0 0. 8 1. 6 2. 4 3. 2 4. 0 10 12 14 16 18 20 v cc supply voltage (v) input voltage (v) mi n. figure 8a. logic ?1? input voltage vs. temperature figure 8b. logic ?1? input voltage vs. supply voltage figure 9a. logic ?0? input voltage vs. temperature figure 9b. logic ?0? input voltage vs. supply volta ge
ir2106(4) ( s & (pbf) ) www.irf.com 11 0 1 2 3 4 -50 -25 0 25 50 75 100 125 temperature ( o c) high level output voltage (v) typ. max. 0 1 2 3 4 10 12 14 16 18 20 v bias supply v oltage (v ) high level output voltage (v) typ. max. 0 0. 3 0. 6 0. 9 1. 2 1. 5 -50-25 0 255075100125 temperature ( o c) low level output voltage (v) fi 11a l l l o t t typ. max. 0 0. 3 0. 6 0. 9 1. 2 1. 5 10 12 14 16 18 20 v bias supply voltage (v) low level output voltage (v) typ. max. figure 10a. high level output voltage vs. temperature figure 10b. high level output voltage vs. supply voltage figure 11a. low level output voltage vs. temperature figure 11b. low level output voltage vs. supply volta ge
ir2106(4) ( s ) & (pbf) 12 www.irf.com 0 100 200 300 400 500 -50 -25 0 25 50 75 100 125 temperature ( o c) of f set supply leakage current ( a) m ax. 0 100 200 300 400 500 0 100 200 300 400 500 600 v b boost voltage (v) of fset supply leakage current ( a) max. 0 100 200 300 400 -50 -25 0 25 50 75 100 125 temperature ( o c) v bs supply current ( a) typ. m ax. mi n. 0 100 200 300 400 10 12 14 16 18 20 v bs supply voltage (v) v bs supply current ( a) typ. max. mi n . figure 12a. offset supply leakage current vs. temperature figure 12b. offset supply leakage current vs. supply voltage figure 13a. v bs supply current vs. temperature figure 13b. v bs supply current vs. supply volta ge
ir2106(4) ( s & (pbf) ) www.irf.com 13 0 100 200 300 400 10 12 14 16 18 20 v cc supply voltage (v) v cc supply current ( a) max . typ. mi n. 0 10 20 30 40 50 60 -50 -25 0 25 50 75 100 125 temperature ( o c) logic "1" input current ( a) typ. max. 0 10 20 30 40 50 60 10 12 14 16 18 20 v cc supply voltage (v) logic "1" input current ( a) max. typ. figure 14a. quiescent v cc supply current vs. temperature figure 14b. quiescent v cc supply current vs. v cc supply voltage figure 15a. logic ?1? input current vs. temperature figure 15b. logic ?1? bias current vs. supply volta ge 0 100 200 300 400 -50 -25 0 25 50 75 100 125 tem perature ( o c) v cc s uppl y c urrent ( a) max. typ. mi n.
ir2106(4) ( s ) & (pbf) 14 www.irf.com 0 1 2 3 4 5 -50 -25 0 25 50 75 100 125 temperature ( o c) logic "0" input current ( a) max. 0 1 2 3 4 5 10 12 14 16 18 20 v cc supply voltage (v) logic "0" input current ( a) fi 16b l i "0" i c m ax. 7 8 9 10 11 12 -50 -25 0 25 50 75 100 125 temperature ( o c) v cc uvlo threshold (+) (v) typ. m ax. mi n. 6 7 8 9 10 11 -50 -25 0 25 50 75 100 125 temperature ( o c) v cc uvlo threshold (-) (v) typ. max. mi n. figure 16a. logic ?0? input current vs. temperature figure 16b. logic ?0? input currentt vs. supply voltage figure 17. v cc undervoltage threshold (+) vs. temperature figure 18. v cc undervoltage threshold (-) vs. temperature
ir2106(4) ( s & (pbf) ) www.irf.com 15 7 8 9 10 11 12 -50 -25 0 25 50 75 100 125 temperature ( o c) v bs uvlo threshold (+) (v) typ. m ax. mi n. 6 7 8 9 10 11 -50 -25 0 25 50 75 100 125 temperature ( o c) v bs uvlo threshold (-) (v) typ. max. mi n. 0 100 200 300 400 500 -50 -25 0 25 50 75 100 125 temperature ( o c) output source current ( a) typ. mi n. 0 100 200 300 400 500 10 12 14 16 18 20 v bias supply voltage (v) output source current ( a) typ. mi n. figure 19. v bs undervoltage threshold (+) vs. temperature figure 20. v bs undervoltage threshold (-) vs. temperature figure 21a. output source current vs. temperature figure 21b. output source current vs. supply volta ge
ir2106(4) ( s ) & (pbf) 16 www.irf.com 0 100 200 300 400 500 600 -50 -25 0 25 50 75 100 125 temperature ( o c) output sink current ( a) typ. mi n. 0 100 200 300 400 500 600 10 12 14 16 18 20 v bias supply voltage (v) output sink current ( a) typ. mi n. -1 0 -8 -6 -4 -2 0 10 12 14 16 18 20 v bs floating supply voltage (v) v s offset supply voltage (v) typ. figure 22a. output sink current vs. temperature figure 22b. output sink currentt vs. supply voltage figure 23. maximum v s negative offset vs. supply voltage 20 40 60 80 100 120 140 1 10 100 1000 frequency (khz) temprature ( o c) 70v 140v 0v figure 24. ir2106 vs. frequency (irfbc20), rgate=33 ? ? ? ? ? , vcc=15v
ir2106(4) ( s & (pbf) ) www.irf.com 17 20 40 60 80 100 120 140 1 10 100 1000 frequency (khz) temperature ( o c) 140v 70v 0v figure 26. ir2106 vs. frequency (irfbc40), r gate =15 ? , v cc =15v 20 40 60 80 100 120 140 1 10 100 1000 frequency (khz) temperature ( o c) 140v 0v 70v figure 25. ir2106 vs. frequency (irfbc30), r gate =22 ? , v cc =15v 20 40 60 80 100 120 140 1 10 100 1000 frequency (khz) temperature ( o c) 140v 0v 70v figure 28. ir21064 vs. frequency (irfbc20), r gate =33 ? , v cc =15v 20 40 60 80 100 120 140 1 10 100 1000 frequency (khz) temperature ( o c) 0v 1 40v 70v figure 27. ir2106 vs. frequency (irfpe50), r gate =10 ? , v cc =15v
ir2106(4) ( s ) & (pbf) 18 www.irf.com 20 40 60 80 100 120 140 1 10 100 1000 frequency (khz) temperature ( o c) 140v 70v 0v figure 30. ir21064 vs. frequency (irfbc40), r g ate =15 ? , v cc =15v 20 40 60 80 100 120 140 1 10 100 1000 frequency (khz) temperature ( o c) 140v 70v 0v figure 29. ir21064 vs. frequency (irfbc30), r ga te =22 ? , v cc =15v 20 40 60 80 100 120 140 1 10 100 1000 frequency (khz) temperature ( o c) 70v 0v 140v figure 31. ir21064 vs. frequency (irfpe50), r gate =10 ? , v cc =15v 20 40 60 80 100 120 140 1 10 100 1000 frequency (khz) temperature ( o c) 0v 70v 140v figure 32. ir2106s vs. frequency (irfbc20), r g ate =33 ? , v cc =15v
ir2106(4) ( s & (pbf) ) www.irf.com 19 20 40 60 80 100 120 140 1 10 100 1000 frequency (khz) temperature ( o c) 0v 140v 70v figure 34. ir2106s vs. frequency (irfbc40), r g ate =15 ? , v cc =15v 20 40 60 80 100 120 140 1 10 100 1000 frequency (khz) temperature ( o c) 140v 70v 0v figure 33. ir2106s vs. frequency (irfbc30), r gate =22 ? , v cc =15v 20 40 60 80 100 120 140 1 10 100 1000 frequency (khz) tempreture ( o c) 140v 70v 0v figure 35. ir2106s vs. frequency (irfpe50), r g ate =10 ? , v cc =15v 20 40 60 80 100 120 140 1 10 100 1000 frequency (khz) temperature ( o c) 140v 70v 0v figure 36. ir21064s vs. frequency (irfbc20), r ga te =33 ? , v cc =15v
ir2106(4) ( s ) & (pbf) 20 www.irf.com 20 40 60 80 100 120 140 1 10 100 1000 frequency (khz) temperature ( o c) 140v 70v 0v figure 39. ir21064s vs . fr e que ncy (irfpe50), r gate =10 ? , v cc =15v 20 40 60 80 100 120 140 1 10 100 1000 frequency (khz) temperature ( o c) 140v 70v 0v figure 37. ir21064s vs. frequency (irfbc30), r gate =22 ? , v cc =15v 20 40 60 80 100 120 140 1 10 100 1000 frequency (khz) temperature ( o c) 1 40v 70v 0v figure 38. ir21064s vs. frequency (irfbc40), r ga te =15 ? , v cc =15v
ir2106(4) ( s & (pbf) ) www.irf.com 21 case outlines 01-6014 01-3003 01 (ms-001ab) 8 lead pdip 01-6027 01-0021 11 (ms-012aa) 8 lead soic 87 5 65 d b e a e 6x h 0.25 [.010] a 6 4 3 12 4. outline conforms to jedec outline ms-012aa. notes: 1. dimensioning & tolerancing per asme y14.5m-1994. 2 . c o n t r o l l in g d im e n s io n : m il l im e t e r 3. dimensions are shown in millimeters [inc hes]. 7 k x 45 8x l 8x c y footprint 8x 0.72 [.028] 6.46 [.255] 3x 1.27 [.050] 8x 1.78 [.070] 5 dimension does not include mold protrusions. 6 dimension does not include mold protrusions. mo ld p rotrus io ns no t to exc eed 0.25 [.010]. 7 dimens ion is the leng th of lead fo r soldering to a substrate. mo ld p rotrus io ns no t to exc eed 0.15 [.006]. 0.25 [.010] c a b e1 a a1 8x b c 0.10 [.004] e1 d e y b a a1 h k l .189 .1497 0 .013 .050 b asic .0532 .0040 .2284 .0099 .016 .1968 .1574 8 .020 .0688 .0098 .2440 .0196 .050 4.80 3.80 0.33 1.35 0.10 5.80 0.25 0.40 0 1.27 basic 5.00 4.00 0.51 1.75 0.25 6.20 0.50 1.27 min max millimeters in c h e s min max dim 8 e c .0075 .0098 0.19 0.25 .025 b asic 0.635 b asic
ir2106(4) ( s ) & (pbf) 22 www.irf.com 01-6010 01-3002 03 (ms-001ac) 14 lead pdip 01-6019 01-3063 00 (ms-012ab) 14 lead soic (narrow body)
ir2106(4) ( s & (pbf) ) www.irf.com 23 leadfree part marking information order information basic part (non-lead free) 8-lead pdip ir2106 order ir2106 8-lead soic ir2106s order ir2106s 14-lead pdip ir21064 order ir21064 14-lead soic ir21064s order ir21064s leadfree part 8-lead pdip ir2106 order ir2106pbf 8-lead soic ir2106s order ir2106spbf 14-lead pdip ir21064 order ir21064pbf 14-lead soic ir21064s order ir21064spbf lead free released non-lead free released part number date code irxxxxxx yww? ?xxxx pin 1 identifier ir logo lot code (prod mode - 4 digit spn code) assembly site code per scop 200-002 p ? marking code ir world headquarters: 233 kansas st., el segundo, california 90245 tel: (310) 252-7105 this product has been qualified per industrial level data and specifications subject to change without notice. 4/12/2004


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